In the previous post, we built the physical frame allocator required to construct page tables dynamically. Until now, the kernel has relied on an identity mapping, with virtual addresses equal to physical addresses, which was enough to enable the MMU and continue execution with address translation enabled. The next step is to map the kernel […]
Recent Posts
In the previous post, we laid the hardware foundation for our virtual memory subsystem: configuring the MMU, setting up MAIR attributes, and establishing an identity mapping to ensure our kernel survived the transition to address translation. While we successfully enabled translation without crashing, our current translation tables are backed by statically reserved storage. To build […]
It has been several months since I started integrating Artificial Intelligence (AI) extensively into my daily workflow. What began as a tool for isolated queries has evolved into a core component of my personal projects and professional tasks. During this time, I have witnessed the staggering pace of the AI ecosystem, but one specific moment […]
In the previous post, we moved from structural parsing to semantic interpretation of the Device Tree, allowing our kernel to dynamically discover peripheral addresses and interrupt lines. But while we have successfully purged hardcoded addresses from the assembly in favor of dynamic discovery, we are still operating in a flat, unprotected physical address space. To […]
In the previous post, we built a structural parser that transformed the raw Device Tree Blob (DTB) into a searchable table of PlatformDevice entries. While we can now traverse the tree and see property names like reg or compatible, these properties are still just raw, big-endian byte buffers. Our kernel knows a device exists, but […]